hdlbits-Norgate

Norgate

Create a module that implements a NOR gate. A NOR gate is an OR gate with its output inverted. A NOR function needs two operators when written in Verilog.

An assign statement drives a wire (or "net", as it's more formally called) with a value. This value can be as complex a function as you want, as long as it's a combinational (i.e., memory-less, with no hidden state) function. An assign statement is a continuous assignment because the output is "recomputed" whenever any of its inputs change, forever, much like a simple logic gate.

norgate

Hint

Verilog has separate bitwise-OR (|) and logical-OR (||) operators, like C. Since we're working with a one-bit here, it doesn't matter which we choose.

solution

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module top_module( 
input a,
input b,
output out );
assign out = ~(a | b);
endmodule


hdlbits-Norgate
http://456-xiao.github.io/2024/08/03/hdlbits-Norgate/
作者
xyh
发布于
2024年8月3日
许可协议