Mt2015-q4

The top-level design consists of two instantiations each of subcircuits A and B, as shown below.

Mt2015_q4

hint

You may choose to create this circuit hierarchically using the two submodules as shown in the diagram, or create the same functionality without hierarchy.

solution

module top_module (input x, input y, output z);
	wire z0, z1, z2, z3;
    a a1(x, y, z0);
    b b1(x, y, z1);
    a a2(x, y, z2);
    b b2(x, y, z3);
    assign z = (z0 | z1) ^ (z2 & z3);
endmodule

module a(input x, input y, output z);
	assign z = (x^y) & x;
endmodule

module b(input x, input y, output z);
	assign z = ~(x^y);
endmodule